Byte addressable memory are read only, that is we can't write to word addressable memory. The size of these register depends upon the computer architecture.
When cpu is on to fetch any data or instruction from memory, it places the 32 bit memory address into MAR. This address is then used to calculate the address of memory word in main memory. Since, the size of memory word is 4 bytes. Two higher order bits of 32 bit memory address are generally discarded to make it a 30 bit address and placed in the MAR.
The 30 bit address is used to access a memory word. Address 0 points to first memory word that is bytes , address 1 points second word that is, bytes and so on. The respective memory word is fetched and stored in the MDR. If we consider the same ram size of 4 GB a byte addressable memory generally does not have such huge memory.
So, size of the PC will be 32 bits. When cpu will fetch any data from ram it will plave 32 bits address in the PC, this 32 bit address will be required to address a certain byte in the memory. Address 0 will point to bytes 0, address 1 will point to bytes 1 and so on.
Add a comment. Active Oldest Votes. A byte is a memory unit for storage A memory chip is full of such bytes. It means: A binary address always points to a single byte only. A word is just a group of bytes — 2 , 4 , 8 depending upon the data bus size of the CPU. Chen Li 4, 2 2 gold badges 20 20 silver badges 45 45 bronze badges.
KawaiKx KawaiKx 8, 16 16 gold badges 65 65 silver badges 94 94 bronze badges. From what I've understand your answer, there should be some sort of a circuitry in the CPU to decide whether the memory operation targets a byte or word, especially when the data has arrived back to the MDR, for instance, to read only the first byte of bit data bus.
But I'm doubtfulI that it's a right assumption? Maaverik Maaverik 1 1 silver badge 8 8 bronze badges. Peter Cordes Peter Cordes k 39 39 gold badges silver badges bronze badges.
And C11 would require that, if it supports threading: writing one char array element must not do a non-atomic RMW of the containing word, because that could introduce data races not present in the source.
My understanding is that some modern DSPs are still word-addressable. But I didn't know that 5 years ago. Sign up or log in Sign up using Google. Sign up using Facebook. Sign up using Email and Password. Post as a guest Name. Email Required, but never shown.
The Overflow Blog. Podcast Explaining the semiconductor shortage, and how it might end. Does ES6 make JavaScript frameworks obsolete? Featured on Meta. Now live: A fully responsive profile. Linked Related As mentioned above that each data or in simple language every word that we provide to computer it stores it in its memory whether in temporary cache or permanent memory.
But before storing it to memory there is conversion of word in bits. Now the collection of these bits is going to be stores in the memory. Memory of computer is divided into chunks or we can say sections which basically hold the converted bits. So this type of addressing in which we treat each section of memory which is that storage of 32 bits or 4 bytes is known as Word Addressable Memory.
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